Limiting thickness of pore walls formed in processes of anode etching of heavily doped semiconductors

With a decrease in the thickness of walls separating space pores porous semiconductors, potential energy interaction between an electron and donor (or hole acceptor) can become greater than kinetic free charge carrier. As consequence, such interlayers lose their conductivity transit into dielectric state (Mott phase transition). regard to conditions electrochemical pore formation, this means that as channels approach each other during anodic etching distance at which current flow through wall separates them stops, its surface ceases be determined by external electric bias process, leads further wall, stops. Expressions are obtained for limiting formed degenerate semiconductors n- p-type conductivity. In contrast well-known model relates loss combination layers, proposed allows consistent explanation experimental data both silicon with doping levels above 10 18 cm -3 . Keywords: limitation, silicon, donor, acceptor.